skip to main content

Arthur Ban

Arthur Ban is a Performance Lab Leader at the STG Power R&D Lab in Austin and has been with IBM since 1987. Before joining the STG, Arthur served in IBM as an OfficeVision/MVS development Project Leader, OfficeVision/CICS performance analyst, and OS/2 system performance analyst. Arthur has development and performance area expertise in numerous IBM systems ranging from PC to mainframe and all Power system products. He has a Master of Science degree in computer science from the University of Texas at Arlington.

Arthur Ban has authored the following document.

All Documents by Arthur Ban

Positioning IBM System x3750 M4 for High Performance Computing Workloads (withdrawn)
Positioning Information, first published 28 Nov 2012

  • 1-1 of 1